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Advanced Digital Design with the Verilog(TM) HDL 🔍
Ciletti, Michael D., Michael D. Ciletti Prentice Hall ; Pearson Education [distributor, Prentice Hall Xilinx design series, 1st ed, Upper Saddle River, N.J, New Jersey, 2003
英语 [en] · PDF · 259.2MB · 2003 · 📗 未知类型的图书 · 🚀/duxiu/zlibzh · Save
描述
Behavioral modeling with a hardware description language (HDL) is the key to modern ASIC design. Readers preparing to contribute to a productive design team must know how to use a hardware description language at key stages of the design flow. This book is written for a course going beyond the basic principles and methods learned in a first course in digital design.
Our focus is on design methodology enabled by an HDL. Our goal is to build on a student's background from a first course in logic design by
reviewing basic principles of combinational and sequential logic,
introducing the use of HDLs in design,
emphasizing descriptive styles that will allow the reader to quickly design working circuits suitable for application-specific integrated circuit (ASIC) and/or field-programmable gate array (FPGA) implementation, and
providing in-depth design examples using modern design tools. Readers are encouraged to simplify, clarify, and verify their designs.
The Verilog hardware description language (IEEE Standard 1364) serves as a common framework supporting the design activities treated in this book, but our focus is on developing, verifying, and synthesizing designs of digital circuits, not on the Verilog language. Most students taking a second course in digital design will be familiar with at least one programming language and will be able to draw on that background in reading this text. We cover only the core and most widely used features of Verilog.
Chapter 1: Introduction to Digital Design Methodology
Chapter 2: Review of Combinational Logic Design
Chapter 3: Fundamentals of Sequential Logic Design
Chapter 4:Introduction to Logic Design with Verilog
Chapter 5: logic Design with Behavioral Models of Combinational and Sequential Logic
Chapter 6: Synthesis of Combinational and Sequential Logic
Chapter 7: Design and Synthesis of Datapath Controllers
Chapter 8: Programmable Logic and Storage Devices
Chapter 9: Algorithms and Architectures for Digital Processors
Chapter 10: Architectures for Arithmetic Processors
Chapter 11: Postsynthesis Design Tasks
Appendices
备用文件名
zlibzh/no-category/Ciletti, Michael D., Michael D. Ciletti/ADVANCED DIGITAL DESIGN WITH THE VERILOG HDL_115350960.pdf
备选标题
Logic and Computer Design Fundamentals [book + Electronic Resource].
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Xilinx Student Edition 4.2i Value Package Version
备选标题
Digital design : principles and practices
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Documentation, Design Environment. 2
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Xilinx 6.3 Student Edition
备选作者
M. Morris Mano; Charles R. Kime
备选作者
John F. Wakerly
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Xilinx Inc.
备用出版商
Globe Fearon Educational Publishing
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Pearson Education, Inc
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Pearson/Prentice Hall
备用出版商
Longman Publishing
备用出版商
Cengage Gale
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Not Avail
备用版本
Prentice Hall XILINX design series, Upper Saddle River, N.J, New Jersey, 2010
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Prentice Hall Xilinx design series, 3rd ed, Upper Saddle River, N.J, ©2000
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Prentice Hall Xilinx design series, 1st ed, Upper Saddle River, NJ, 2002
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Prentice Hall XILINX design series, 2nd ed, Boston, cop. 2011
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3rd ed., International ed, Upper Saddle River, cop. 2002
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4th ed., Upper Saddle River, N.J, New Jersey, 2006
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2nd ed, Upper Saddle River, N.J., London, 2009
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United States, United States of America
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3rd ed, Upper Saddle River, NJ, ©2002
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Pearson Education (US), [N.p.], 2011
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3rd ed, Upper Saddle River, NJ, 2004
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Bk&CD-Rom edition, August 13, 2002
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Cdr Stu edition, December 8, 2004
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Student Edition Package, 2004
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Har/Cdr edition, August 2002
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December 31, 2004
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1, 2004-12-18
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Jun 03, 2003
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2, PS, 2010
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2022
元数据中的注释
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元数据中的注释
Book & CD
元数据中的注释
Includes bibliographical references and index
元数据中的注释
Includes bibliographical references and index.
元数据中的注释
Includes "Student access kit" for access to online course materials that accompany Digital design, 4th ed.
Includes index.
System requirements for Active-HDL CD-ROM: Windows 2000/XP/NT 4.0 SP6; Pentium PC or higher; 128MB (256 MB recommended); 360+ MB spare hard disk memory space; 1280 x 1024 monitor resolution; Internet Explorer version 4.0 or higher.
System requirements for Xilinx CD-ROMs: Windows 2000/SP2/SP3/SP4/XP SP1; Pentium-class machine minimu 500MHz; 128-512 MB RAM; 128-512 MB virtual memory; 1024 x 768 colour VGA (minimum recommended).
备用描述
Advanced Digital Design with the Verilog HDL, 2e, is ideal for an advanced course in digital design for seniors and first-year graduate students in electrical engineering, computer engineering, and computer science. This book builds on the student's background from a first course in logic design and focuses on developing, verifying, and synthesizing designs of digital circuits. The Verilog language is introduced in an integrated, but selective manner, only as needed to support design examples (includes appendices for additional language details). It addresses the design of several important circuits used in computer systems, digital signal processing, image processing, and other applications.
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This newly revised book blends academic precision and practical experience in an authoritative introduction to basic principles of digital design and practical requirements in both board-level and VLSI systems. With over twenty years of experience in both university and industrial settings, John Wakerly has directly taught thousands of engineering students, indirectly taught tens of thousands through his books, and directly designed real digital systems representing tens of millions of dollars of revenue
备用描述
CD-ROM contains: WaveFormer Pro (interactive HDL simulator, timing diagram editor, VHDL, Verilog, & SPICE stimulus generator) -- VeriLogger Pro (Verilog simulator with unit level test environment) -- TestBencher Pro (generates reactive VHDL and Verilog test benches from timing diagrams, detects glitches, bad data, & timing violations) -- DataSheet Pro (data book design environment with OLE & TDML support) -- TimingDiagrammer Pro (timing diagram editor with TDML)
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This new guide covers the key design problems of modeling, architectural tradeoffs, functional verification, timing analysis, test generation, fault simulation, design for testability, logic synthesis, and postsynthesis verification. The author's focus is on developing, verifying, and synthesizing designs of digital circuits rather than on the Verilog language.
备用描述
New edition features include de-emphasis of manual turn-the-crank procedures and MSI design, and earlier coverage of PLDs, FPGAs, and hardware design languages to get maximum leverage from modern components and software tools. HDL coverage now includes VHDL as well as ABEL. Book jacket
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The book covers the fundamental building blocks of digital design across several levels of abstraction, from CMOS gates to hardware design languages. Important functions such as gates, decoders, multiplexers, flip-flops, registers, and counters are discussed at each level
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Aimed at advanced courses in digital design for seniors and first-year graduate students in electrical engineering, computer engineering, and computer science, this book assumes and builds on the background of a first course in logic design.
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Accompanying CD-ROM contains the Silos-III Verilog design environment and simulator and the Xilinx integrated synthesis environment (ISE) synthesis tool for FPGAs
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CD-ROM contains: Silos-III Verilog desgn environment and simulator -- Kilinx integrated synthesis environment (ISE) synthesis tool for FPGAs
开源日期
2024-06-13
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