Self-Checking and Fault-Tolerant Digital Design (The Morgan Kaufmann Series in Computer Architecture and Design) 🔍
Lala, Parag K., 1948- San Francisco: Morgan Kaufmann, San Francisco, California, 2001
英语 [en] · PDF · 10.5MB · 2001 · 📗 未知类型的图书 · 🚀/ia · Save
描述
With VLSI chip transistors getting smaller and smaller, today's digital systems are more complex than ever before. This increased complexity leads to more cross-talk, noise, and other sources of transient errors during normal operation. Traditional off-line testing strategies cannot guarantee detection of these transient faults. And with critical applications relying on faster, more powerful chips, fault-tolerant, self-checking mechanisms must be built in to assure reliable operation.
Self-Checking and Fault-Tolerant Digital Design deals extensively with self-checking design techniques and is the only book that emphasizes major techniques for hardware fault tolerance. Graduate students in VLSI design courses as well as practicing designers will appreciate this balanced treatment of the concepts and theory underlying fault tolerance along with the practical techniques used to create fault-tolerant systems.
* Introduces reliability theory and the importance of maintainability
* Presents coding and the construction of several error detecting and correcting codes
* Discusses in depth, the available techniques for fail-safe design of combinational circuits
* Details checker design techniques for detecting erroneous bits and encoding output of self-checking circuits
* Demonstrates how to design self-checking sequential circuits, including a technique for fail-safe state machine design
"...helps researchers, practitioners & students learn how to design digital systems in the most reliable & efficient way ...describes the engineering aspects, techniques & methodologies.
备选作者
Parag K. Lala
备用出版商
Academic Press, Incorporated
备用出版商
Morgan Kaufmann Publishers
备用出版商
Brooks/Cole
备用版本
United States, United States of America
备用版本
1, First Edition, PS, 2000
备用版本
San Diego, 1999
备用版本
London, 2001
元数据中的注释
Includes bibliographical references and index.
备用描述
Chip designers are packing more and more transistors on a chip, increasing not only chip power and performance, but also the potential for errors at the signal level. As a result, a whole set of fault tolerance techniques have been developed for designing circuits so that they detect and either mask or recover from faults which result from these errors. Self-checking circuits are an important part of creating a fault tolerant system.Written by a leading researcher in self-checking circuit design, this book examines all the major techniques for hardware fault tolerance and presents the most comprehensive coverage available on techniques for implementing self-checking circuits, providing a uniquely valuable reference for today's practicing designers.
备用描述
"Self-Checking and Fault-Tolerant Digital Design deals extensively with self-checking design techniques and emphasizes major techniques for hardware fault tolerance. Graduate students in VLSI design courses as well as practicing designers will appreciate this balanced treatment of the concepts and theory underlying fault tolerance, along with the practical techniques used to create fault-tolerant systems."--BOOK JACKET.
备用描述
xii, 216 p. : 25 cm
Includes bibliographical references and index
开源日期
2023-06-28
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